Photonics Layout Engineer

About Celestial AI

As the industry strives to meet the demands of the AI workloads, bottlenecks in data transfers between processors and memory have hindered progress. The Photonic Fabric based Memory Fabric provides an optically scalable solution to the ‘Memory Wall’ problem, enabling tens of Terabytes of memory capacity at full HBM bandwidths with low tens of nanoseconds of latency and extremely low power. The Photonic Fabric based Compute Fabric enables Terabyte class bandwidth between compute nodes at low latency and power. Photonic Fabric delivers a transformative leap in AI system performance, ten years more advanced than existing technologies.

JOB DUTIES AND RESPONSIBILITIES:

• Be a key part of the Physical Design team that is responsible for the layout of Silicon Photonic chips, subsystems and devices.
• Contribute to product Photonic IC (PIC) delivery, all the way from floor-planning and top-level block placement to optical & electrical routing and back-end DRC and LVS verification.
• Work in conjunction with broader analog, digital and packaging teams to drive PIC physical design in accordance with product requirements related to opto-electronic performance, signal integrity (SI) & power integrity (PI).
• Work closely with the rest of the Photonics team to optimize layout flows and add to existing software base for automated design and verification.

QUALIFICATIONS/SKILLS:

• Specialized skills
  • Strong experience with physical design packages (Cadence, Siemens Mentor, Klayout or similar), including layout automation within these tools using SKILL, Python or similar.
  • Strong experience with Silicon Photonics Process Design Kits and related best practices in the layout of photonic devices, sub-systems and full chips.
  • Experience with layout verification tools for DRC, ERC and LVS (Calibre, Pegasus or similar). Ability to create custom decks within these tools is a plus.
  • Familiarity with SI and PI-aware electrical routing for analog and digital blocks is a strong plus.
• Education requirements
  • Minimum MS in engineering or physics.
• Experience requirements
  • Minimum 7 years of relevant experience
• Attributes
  • Self-starter
  • Thrives in a highly collaborative and dynamic work environment
  • Has excellent oral and written communication skills
  • Creativity in problem-solving with strong attention to detail

Location: Santa Clara, CA

Compensation:

As an early startup, we offer an attractive total compensation package, inclusive of competitive base salary and a generous grant of our valuable early-stage equity. The target base salary for this role is approximately $180,000 - $225,000. The base salary offered may be slightly higher or lower than the target base salary, based on the final scope as determined by the depth of the experience and skills demonstrated by the candidate in the interviews.

We offer great benefits (health, vision, dental and life insurance), collaborative and continuous learning work environment, where you will get a chance to work with smart and dedicated people engaged in developing the next generation architecture for high performance computing.

Celestial AI Inc. is proud to be an equal opportunity workplace and is an affirmative action employer.

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