Staff/Principal Power Management Design Engineer

Array Labs is building a distributed radar imaging constellation to power the first accurate, real-time 3D model of the world.

The Hardware Engineering team at Array Labs is responsible for the analysis and design of our satellite and ground-station hardware platforms. These platforms tend to be a heterogeneous mix of various subsystems like compute, memory, peripherals with high-speed interfaces, RF, sensing, power management, navigation, and controls. The focus areas of the Hardware Engineering Team can be split into Aerospace/Avionics, Electrical/Electronics (EE), and Communications/Radar engineering. As a Power Management Design Engineer in the Communications/Radar team, you will own the simulation, design, prototyping, validation, and production of the critical power management system for the radar/communication payload on our satellites. You will be collaborating with RF, communications, and radar engineers to ensure the design satisfies the stringent requirements necessary to support Array Lab’s mission objectives.

Responsibilities:

• Translating high-level power requirements into design specifications, evaluating design trade-offs, and defining high-effici...