We are looking for a CPU core level feature / testplan verification engineer responsible for ISA and micro-architectural verification.
This role is on-site, based out of Bangalore, India.
Responsibilities:
- Functional verification with emphasis on core level testplanning, stimulus development and regression debug for simulation and emulation regressions
- Understand ISA and microarchitectural specifications for the Core and create comprehensive testplans
- Hands-on debug for core level failures. Propose and implement stimulus enhancements and debug capability improvements for core, cluster and chip level testbench environments
- Develop architectural and microarchitectural coverage for core features and create stimulus for closing coverage in a timely manner
- Support design deployment across simulation and emulation platforms
- Develop random and directed stimulus that spans pre-silicon, emulation and post-silicon domain
- Work with design, test and post silicon validation teams to ensure high quality delivery of the entire CPU core / cluster
Experience & Qualifications:
- BS/MS/PhD in EE/ECE/CE/CS with at least 3 years of experience
- Strong background and experienc...
Tenstorrent
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