- Responsible for full chip SOC level Verification and sign-off
- Verification Methodology
- Works with sub-system leads on functional verification.
- SOC level Test bench strategy,
- Test plan writing and reviews, Use case analysis, functional & performance verification.
- Emulation and FPGA prototyping.
- Works with post-silicon debug on silicon functionality bringup etc.
Requirements
- B.Tech/MTech with 18+ years of experience in full SOC level and sub-system level verification
- Having worked on verification of multiple complex SOC devices at the highest quality.
Renesas Electronics
Renesas is a top global semiconductor company developing products for automotive, industrial, infrastructure, and IoT markets.
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