- Define and architect high-performance blocks for the automotive radar SOCs
- Perform micro-architecture and RTL design
- Collaborate with verification team in the development of the test plan and assist in debugging test failures
- Collaborate with the physical design team to develop timing constraints, analyse timing violations and perform timing fixes
Requirements
- BE/MTech/MS/PhD with 8+ years of ASIC design experience.
- Strong RTL coding skills
- Strong logical analysis skills
- Working experience with Real time and DSP processors is desired
- Working experience with bus protocols such as AXI/AHB
- Experience in Ethernet, MIPI, CAN and Aurora are desired
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Renesas Electronics
Renesas is a top global semiconductor company developing products for automotive, industrial, infrastructure, and IoT markets.
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