Synthesis Engineer

For nearly four decades, Cirrus Logic has been propelled by the top engineers in mixed-signal processing. Our rockstar team thrives on solving complex challenges with innovative end-user solutions for the world's top consumer brands. Cirrus Logic is also known for an award-winning culture, which was built on a foundation of inclusion and fairness, meaningful community engagement and delivering enjoyable employee experiences at every turn. But we couldn’t do it without our extraordinary workforce – and that’s where you come in. Join our team and help us continue to make Cirrus Logic an exceptional place to grow your career!

DUTIES:

• Responsible for all phases of design from RTL to GDSII; performing RTL synthesis and scan stitching of the design; apply deep knowledge of timing optimization and experience with ECO generation to analyze and fix timing issues; define and debug Timing Constraints and perform STA using industry-standard STA engines to achieve timing closure; building timing constraints for the entire chip in a team environment; perform logical equivalence checks on the synthesized design; running Static Timing Analysis to close timing, perform ECOs and tape-out...