At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology.
You will be a member of an expert R&D team creating technologies and products that enable static and dynamic transistor level analysis and characterization of the most advanced custom digital and mixed-signal circuits built for communication, IOT and AI markets.
Your work will be focused on:
- Developing tools and infrastructure for transistor-level design analysis and characterization of analog and mixed signal (AMS) and memory designs.
- Support productization of tools for characterization and design analysis including product planning, testing, and supporting customer deployment.
- Creating new frameworks for analysis of effects dominant in new silicon process nodes (N5 and below)
Desired Skills and Experience:
- Industry experience developing and maintaining C++ based applications on a Unix or Linux environment
- Experience with quality and software processes
- Proficiency designing data structures, algorithms, and software engineering principles
- The candidate is expected to have a BS in CS/EE/CE with 4 years of related experience, MS with 2 years of experience or PhD with 0 years of experience
The annual salary range for California is $110,600 to $205,400. You may also be eligible to receive incentive compensation: bonus, equity, and benefits. Sales positions generally offer a competitive On Target Earnings (OTE) incentive compensation structure. Please note that the salary range is a guideline and compensation may vary based on factors such as qualifications, skill level, competencies and work location. Our benefits programs include: paid vacation and paid holidays, 401(k) plan with employer match, employee stock purchase plan, a variety of medical, dental and vision plan options, and more.
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Cadence Design Systems
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