Staff DFT Engineer

- Define DFT design specification, make DFT Stratergy to achieve the test time & Test cost & Test coverage; Provide Technical solution
- Perform Implementation and verification DFT circuit
- Define DFT SDC (timing constraint) strategy.
- Tester pattern making, Tester pattern debugging.
- Collaborate with FE/BE teams to finish chip design within definited schedule.

Requirements

- Have +7 years of experienced in DFT design & Project control.
- Bachelor or Master Degree in Information Technology/Computer Engineering/Computer Science/Telecoms/Electronics or similar.
- Solid knowledge in using EDA tool (Synopsys, Cadence, Siemen, ...)
- Have experience in logic related design activities (clock design, system control design, synthesis, RTL design, logic verification,...)
- Good written and oral communication (in English) & interpersonal skills
- Strong team-oriented working and good relationship-building with others