Power Integrity Engineer

As a Power Integrity Engineer specializing in Power Management Integrated Circuits (PMICs), your role is pivotal in ensuring the robustness of chip designs through Power Integrity simulations and analysis. By understanding PMICs and their specific requirements, you will recommend essential PI/SI analyses, leveraging your experience and tools to optimize power distribution networks. Beyond project support, your responsibilities include proactive research initiatives aligned with business objectives, proposing topics to enhance the team's capabilities, and fostering collaboration with cross-functional teams. Your contributions directly impact the success of semiconductor projects, shaping the future of power management solutions and advancing technology in the ever-evolving semiconductor industry.

Requirements

• 2 - 5 years of relevant experience
• Knowledge of and working with voltage regulators (Buck, Buck-Boost, LDO), key parameters and measurement methods.
• Expertise: experience in Power Integrity for PMICs, understanding relation between PMIC chip design and Power Integrity/Power Distribution Networks.
• Knowledge of power electronics, PDN, parasitic and noise analysis.
• Research: Adept at research initiatives, proposing innovative topics aligned with business unit roadmaps, and contributing to the advancement of the team's capabilities.
• Collaboration: Strong collaborative skills, fostering effective communication with cross-functional teams and mentoring junior engineers.
• Proactive Problem-Solving: Demonstrated ability to proactively identify potential issues, propose additional analyses, and contribute to continuous improvement.
• Scripting: ideally, knowledge in using tools (Python) to automate tasks.
• Analog Design: ideally, sound knowledge in Analog chip design, including industry standard tools (Cadence)
• Goals-oriented and able to deliver on-time results under tight schedules.