DFT Engineer - ASIC Development

Senior
🇮🇳 India
Technology

We are seeking a highly skilled and experienced DFT Engineer to join our dynamic team of engineers to develop the next-generation Flash Controllers. As an SoC DFT Engineer, you will be responsible for defining and implementing industry leading DFT solutions, with emphasis on SCAN, MBIST, BSDL etc. The ideal candidate will have a deep understanding of DFT Architecture, Implementation flow, MBIST, SCAN ATPG & Simulation expertise.

ESSENTIAL DUTIES AND RESPONSIBILITIES:

  • DFT Architecture definitions for SoC development
  • Leading complex activities and providing solutions for complex DFT problems.
  • Collaborate with cross-functional teams to define and refine SoC DFT requirements, ensuring alignment with industry standards and customer needs.
  • Working closely with the Design, Verification, Physical Design & Test Engineering teams while guiding them on the test requirements and methodologies.
  • Work closely with the Product Engineering team and understand the test requirements, get involved in complex silicon debugs.
  • Evaluate all aspects of the SoC DFT flow from requirements, through detailed definitions, and work closely with the CAD to continuously improve the DFT methodology.

Requirements

  • B.Tech / M,Tech / Phd in Electronics, Computer science or Electrical Engineering
  • Minimum 15+ years of experience in DFT
  • Strong understanding of DFT Architecture

SKILLS:

  • Extensive experience in SoC DFT architecture, DFT IP development and DFT methodology.
  • Proven track record of driving DFT architecture in complex ASIC designs.
  • Work independently on multiple complex DFT problems across different projects.
  • Proficiency in ASIC DFT Implementation tools, simulation methodologies, and hardware description languages (HDLs).
  • Proficiency in SCAN, MBIST implementation.
  • Solid understanding of JTAG & BSDL standards.
  • Good understanding on Test clocking requirements, Test mode timing closure.
  • Proficiency in complex silicon debugs and yield analysis.
  • Solid understanding of SoC architecture and low-power design principles.
  • Understanding of High-Speed interfaces (PCIe or UFS protocols) and experience with SSD/Flash is advantage.
  • Excellent analytical and problem-solving skills.
  • Strong communication skills and the ability to work effectively in cross-functional teams.

 

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